A Compact 3D Graphics Chip Set, a lecture by Michael Deering. The video was recorded in August 1993.
From University Video Communications' catalog:
"A complete chip set for building a physically compact, low-cost, high-performance 3D graphics accelerator is described. It supports shaded rendering of triangles and anti-aliased lines into a double buffered 24-bit true color frame buffer with a 24-bit Z-buffer. Four custom chips were designed for the system; 11 instances of these are the only chips beyond standard memory parts and a RAMDAC needed to build the graphics system."